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dinesh_mf
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Joined: 26 May 2005 Posts: 15 Location: maharashtra
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Hi,
I am a novice assembler programmer. I have learned that in 390 compiler the 32 bit is used to check whether the program is running below or above the line.We can say It supports both s/370 as well as s/390 architecture.
If say,IBM has developed the compiler for z/os how many bits would it need to determine on which machine it is running. Meaning to say how would it support the programs below the line, running in 31 bit mode and running in 64 bit mode? |
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SteveConway
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Joined: 26 May 2005 Posts: 28 Location: Northern VA, USA
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The z/Architecture PSW uses positions 31 and 32 to determine addressing mode:
00 24-bit
01 31-bit
10 invalid
11 64-bit
Cheers,,,Steve |
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dinesh_mf
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Joined: 26 May 2005 Posts: 15 Location: maharashtra
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Thank you very much steve. That was the thing I was looking for.
This means that for the 64 bit addressing, the memory segmentation is kept in such a way that the 31 and 32 bit always have 11 in that position as we have in 390 (segment-page - offset). am I right?
Cheers,
Dinesh |
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dinesh_mf
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Joined: 26 May 2005 Posts: 15 Location: maharashtra
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Sorry Steve,
I might have got it wrong.
Now I am clear here we are using PSW itself to find the addressing mode and not the actual address.
again 1 question. please don't mind. if the program running in 64 bit abends, how the PSW will display the address as it contains only the 32 bit to store the address of the next instruction (s390), but actually it is 64 bit. Is ithe PSW modified more than 64 bits for z/architecture?
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dinesh |
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SteveConway
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Joined: 26 May 2005 Posts: 28 Location: Northern VA, USA
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Hi, Dinesh.
You got it right, the z/Arch PSW is 128 bits, with the instruction address at bits 64-127.
Cheers,,,Steve |
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dinesh_mf
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Joined: 26 May 2005 Posts: 15 Location: maharashtra
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steve,
Thank you very much for your help.
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palas_2007 Currently Banned New User
Joined: 30 Jan 2007 Posts: 6 Location: kolkatta
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